1. Field of the Invention
The present invention relates generally to constant voltage circuits, and more particularly to a constant voltage circuit that has a current limiting circuit and can increase the speed of response to a rapid change in input voltage or a sudden change in load current, where the current limiting circuit gradually decreases output current and output voltage alternately so as to perform an overcurrent protection operation having a characteristic close to a foldback characteristic.
2. Description of the Related Art
There has been a conventional constant voltage circuit that can increase the speed of response to a rapid change in input voltage or a sudden change in load current. (See, for example, Japanese Laid-Open Patent Application No. 2005-353037.)
FIG. 1 is a circuit diagram showing such a conventional constant voltage circuit 100.
According to the constant voltage circuit 100 of FIG. 1, in normal times, a first error amplifier circuit AMP1 having an excellent direct-current characteristic controls the operation of an output voltage control transistor M1, thereby converting an output voltage Vo into a constant voltage, and when the output voltage Vo rapidly decreases, a second error amplifier circuit AMP2a having excellent high-speed responsiveness controls the operation of the output voltage control transistor M1 for a predetermined period before the first error amplifier circuit AMP1 responds to control the operation of the output voltage control transistor M1, thereby converting the output voltage Vo into a constant voltage.
Further, the constant voltage circuit 100 includes a current limiting circuit 5a that limits current output from an output terminal OUT. As shown in FIG. 2, when an output current io reaches a current value ia, the current limiting circuit 5a suppresses an increase in the output current of the output voltage control transistor M1, thereby controlling the output voltage control transistor M1 so as to decrease the output voltage Vo. When the output voltage Vo is lowered to a voltage value Vb, an NMOS transistor M22 turns OFF so that the gate voltage of an NMOS transistor M24 increases to decrease the gate voltage of a PMOS transistor M16. As a result, the output current io is limited by a current value ic, so that the output voltage Vo decreases. When the output voltage Vo is lowered to a voltage value Vd, an NMOS transistor M23 further turns OFF so that the gate voltage of the NMOS transistor M 24 further increases to further decrease the gate voltage of the PMOS transistor M16. As a result, the output current io is limited by a current value ie, so that the output voltage Vo further decreases.
However, since the second error amplifier circuit AMP2a, which performs feedback control on the output voltage control transistor M1 serving as a driver transistor by extracting a frequency component of the output voltage Vo, is fast in response, the second error amplifier circuit AMP2a detects the frequency component of a change in the output voltage Vo so as to try to increase the output voltage Vo to a set voltage when the current limiting circuit 5a operates to decrease the output voltage Vo. This causes a problem in that the operation of the constant voltage circuit 100 is unstable. In particular, in a transition from c to d and a transition from e to f in FIG. 2, the second error amplifier circuit AMP2a operates so that the current limiting operation of the current limiting circuit 5a is destabilized.